Comprehensive study of 1-Bit full adder cells: review, performance comparison and scalability analysis

Abstract Full Adder (FA) circuits are integral components in the design of Arithmetic Logic Units (ALUs) modern computing systems. Recently, there have been massive research interests this area due to growing need for low-power and high-performance Researchers proposed a variety FA cells with diverse techniques, each having its pros cons. As result, systematic method performance comparison using common simulation platform has become necessary. In work, we present an extensive study cells. We compared thirty-three (33) existing 1-bit The drive powers these by applying load conditions. addition, extended 32-bit structures test their scalability investigate wide-word structures. determined that twenty-one (21) cannot operate structure, even though some them exhibit excellent as cell. main finding is single-bit parameters should not be considered basis comparison. Any cell analyzed multi-bit structure determine practical effectiveness.